Introduction
Every program you run — a browser, a compiler, a database — believes it owns a huge, private, contiguous block of memory starting at address 0. In reality your machine has a limited amount of physical RAM shared by dozens of processes. Virtual memory is the illusion that bridges this gap: it gives each process its own large virtual address space while the operating system and hardware quietly map those virtual addresses onto whatever physical RAM (and disk) is actually available. Paging is the dominant technique used to build that illusion by chopping memory into fixed-size blocks.
For BCS, Bank IT, and IT-officer exams this is one of the highest-yield Computer Architecture / Operating System topics. Questions come as direct definitions (what is a TLB, what is a page fault), as MCQ calculations (address bits, page-table size, effective access time), and as comparison items (paging vs segmentation, page fault vs cache miss). Master both the concepts and the arithmetic and you can answer almost anything they ask.
Learning objectives
- Explain why virtual memory exists and the problems it solves (capacity, protection, relocation, sharing).
- Define virtual address, physical address, page, frame, page table, and offset from first principles.
- Split any virtual address into page number and offset, and translate it to a physical address.
- Compute page size, number of pages/frames, page-table size, and address-bit layouts.
- Describe the address-translation hardware: MMU, page table, TLB, and multi-level page tables.
- Explain page faults, demand paging, and page-replacement algorithms (FIFO, LRU, Optimal) and compute hit/fault counts.
- Calculate Effective Access Time (EAT) with and without a TLB.
- Distinguish paging from segmentation and virtual memory from cache.