Introduction
Every computer must remember things: the result of the last calculation, whether a key was pressed, the current count in a timer. Combinational circuits (AND, OR, NOT, adders, multiplexers) cannot remember — their output depends only on the present inputs. To store even a single bit, we need a circuit whose output depends on past inputs too. That circuit is built from feedback and is called a latch or a flip-flop. These are the atoms of memory: registers, counters, CPU flags, RAM cells, shift registers — all are made of flip-flops.
For BCS, Bank IT, and IT-officer written and MCQ exams this topic is a guaranteed scorer. Questions almost always test: the difference between a latch and a flip-flop, the excitation/characteristic tables of SR, D, JK and T flip-flops, what the forbidden state is, what edge-triggering and level-triggering mean, what race-around is and how the master–slave design fixes it, and simple numeric problems (next-state given present state and inputs, counting stages/frequency division). Master this page and you can answer any of them.
Learning objectives
- Explain why sequential circuits need memory and how feedback creates it.
- Distinguish a latch (level-sensitive) from a flip-flop (edge-triggered).
- Derive and reproduce the characteristic tables, characteristic equations and excitation tables of SR, D, JK and T flip-flops.
- Identify the forbidden/invalid state of the SR latch and how JK removes it.
- Explain race-around condition and how the master–slave JK solves it.
- Read a timing/state diagram and compute the next state for any input.
- Apply flip-flops to frequency division, counters and registers in exam problems.