BPSC Assistant Programmer (Ministry of Health) Exam: 2021প্রশ্ন ও সমাধান

Three testing techniques covering three very different concerns - correctness of a unit, basic build health, and behaviour under extreme load:

Testing Type	What it checks	When performed	Goal
Unit Testing	Each individual component/function in isolation	First, during development, before integration	Validate that each unit behaves correctly on its own
Smoke Testing	Critical/core functionalities only, at a high level	Right after a new build, before deeper testing	Quickly reject a badly broken build so QA doesn't waste time on it
Stress Testing	Stability and error handling under extreme/beyond-normal load	Later stage, non-functional/performance testing phase	Find the breaking point and confirm the system fails gracefully rather than crashing

• Unit testing is usually automated (e.g. JUnit, xUnit) and written by developers; it is the first level of functional testing and forms the base of the testing pyramid.
• Smoke testing, also called build verification testing, is a shallow, wide pass across the most important features - if it fails, the build is rejected outright without running the full test suite.
• Stress testing deliberately pushes load beyond expected peaks (concurrent users, data volume, transaction rate) to see how/when the system degrades, and whether it recovers cleanly afterward.

Exam takeaway: Unit means the smallest testable piece in isolation; Smoke means a quick pass/fail health check on a new build; Stress means pushing the whole system past its limits to find the breaking point.

NAND and NOR are 'universal gates' - either one alone can build any Boolean function, including NOT, AND, and OR.

Building blocks from NAND only:

Target gate	Construction using only NAND	Why it works
NOT A	Tie both inputs of one NAND to A	NAND(A,A) = (A.A)' = A'
A AND B	NAND(A,B), then invert with a second NAND wired as NOT	((AB)')' = AB
A OR B	Invert A and invert B (NAND-as-NOT each), then NAND the two results	NAND(A',B') = (A'.B')' = A+B, by De Morgan's law

Building blocks from NOR only (the dual construction):

Target gate	Construction using only NOR	Why it works
NOT A	Tie both inputs of one NOR to A	NOR(A,A) = (A+A)' = A'
A OR B	NOR(A,B), then invert with a second NOR wired as NOT	((A+B)')' = A+B
A AND B	Invert A and invert B (NOR-as-NOT each), then NOR the two results	NOR(A',B') = (A'+B')' = A.B, by De Morgan's law

Latch vs Flip-Flop:

Aspect	Latch	Flip-Flop
Triggering	Level-triggered - transparent while enable/clock is high	Edge-triggered - changes only at the clock's rising/falling edge
Timing control	Asynchronous, output can change any time enable is active	Synchronous, output changes only at a precise clock edge
Typical use	Simple, low-cost storage element (e.g. SR latch)	Registers, counters, synchronous sequential circuits

Exam takeaway: any gate can be built from NAND-only or NOR-only using self-tied inputs for NOT plus De Morgan's law for the other gate; a latch is level-sensitive/transparent, a flip-flop is edge-triggered/synchronous - flip-flops, not latches, are what you use to build reliably clocked registers.