BRiCM Assistant Maintenance Engineer: Exam: 24.02.2024প্রশ্ন ও সমাধান

Definition: DHCP (Dynamic Host Configuration Protocol) is an application-layer network protocol that automatically assigns IP addresses and other configuration parameters (subnet mask, default gateway, DNS server) to devices on a network, removing the need for manual IP configuration.

sequenceDiagram
    participant C as Client
    participant S as DHCP Server
    C->>S: 1. DHCPDISCOVER (broadcast)
    S-->>C: 2. DHCPOFFER (proposed IP)
    C->>S: 3. DHCPREQUEST (accepts offer)
    S-->>C: 4. DHCPACK (confirms lease)

The DORA process:

1. Discover — the client broadcasts a request for an IP address.
2. Offer — an available DHCP server responds, offering an unused IP.
3. Request — the client formally requests that specific IP (broadcast, so any other responding servers know their offers were declined).
4. Acknowledge — the server confirms and leases the IP for a fixed duration.

Benefits:

• Eliminates manual configuration errors and IP address conflicts.
• Centralised management of address pools, lease durations, and reconfiguration.
• Supports efficient address reuse via lease expiry and renewal.

Exam takeaway: DHCP uses UDP ports 67 (server) and 68 (client) and follows the DORA sequence (Discover-Offer-Request-Acknowledge) to automatically lease IP configuration to clients.

Definition: A universal gate is a logic gate from which any other basic gate (AND, OR, NOT) — and therefore any Boolean function whatsoever — can be built using only that one gate type, repeated as needed. NAND and NOR are the two universal gates; AND, OR, NOT, XOR, and XNOR are not universal by themselves.

Constructing basic gates using only NAND:

Target gate	Construction from NAND	Logic identity
NOT (A′)	Tie both inputs of one NAND together	A NAND A = A′
AND (A·B)	A NAND gate, followed by a NAND-built NOT	(A NAND B) NAND (A NAND B) = A·B
OR (A+B)	NOT each input first, then NAND the results (De Morgan's law)	A′ NAND B′ = A + B

graph LR
    A --> N1[NAND]
    A --> N1
    N1 -->|"A'"| N2[NAND]
    B --> N3[NAND]
    B --> N3
    N3 -->|"B'"| N2
    N2 -->|"A+B"| OUT((OR Output))

Truth-table verification of the OR construction (A′ NAND B′):

A	B	A′	B′	A′ NAND B′	A OR B
0	0	1	1	0	0
0	1	1	0	1	1
1	0	0	1	1	1
1	1	0	0	1	1

The result matches A OR B exactly, confirming the construction is correct.

Why "universal": Because NAND alone can build NOT, AND, and OR — and {NOT, AND, OR} is a functionally complete set — any digital circuit (adders, flip-flops, multiplexers, even entire CPUs) can in principle be built using nothing but NAND gates. This is why real ICs are commonly fabricated primarily from NAND/NOR gates (CMOS NAND is simpler to manufacture than an AND gate).

Exam takeaway: NAND and NOR are the only universal gates — each alone is functionally complete and can realise AND, OR, and NOT.