49th BCS Written (Special); Subject Code: ICT-281; Exam: 10.10.2025প্রশ্ন ও সমাধান

Correct answer: (a) 128 bits

An IPv6 address is 128 bits long. It is written as eight 16-bit groups of up to four hexadecimal digits separated by colons, e.g. 2001:db8:85a3::8a2e:370:7334 ("::" stands for a run of zero groups).

• Groups × bits: 8 groups × 16 bits = 128 bits (16 bytes)
• Address space: 2¹²⁸ ≈ 3.4 × 10³⁸ addresses, against IPv4's 2³² = 4,294,967,296 (about 4.3 billion)

This huge space was the main reason for moving from IPv4 to IPv6.

Why the other options are wrong

• (b) 4 bits: 4 bits is the size of the Version field in the IP header (value 6 for IPv6), or one hex digit, not an address.
• (c) 32 bits: That is the length of an IPv4 address.
• (d) None of the above: Option (a) is correct, so this cannot be chosen.

Tip: IPv4 = 32 bits (4 bytes, dotted decimal); IPv6 = 128 bits (16 bytes, colon-hex). The IPv6 header, not the address, is 40 bytes.

Source: RFC 4291: IP Version 6 Addressing Architecture
Source: Implementing Network Stack IPv4 and IPv6 - Cisco IOS XR Configuration Guide

Correct answer: (c) Cache

The three main functional components of a CPU are the control unit, the arithmetic logic unit (ALU) and the registers. The control unit fetches and decodes instructions and directs the other parts, the ALU carries out arithmetic and logic operations, and the registers supply operands to the ALU and hold its results. Cache memory is a small, fast memory between the CPU and main memory; it belongs to the memory hierarchy and speeds up access to RAM, but it is not one of the basic units needed to execute instructions.

Why the other options are wrong

• (a) Control unit: A main component; it controls the fetch–decode–execute cycle and generates control signals.
• (b) ALU: A main component; all arithmetic and logical operations are performed here.
• (d) Registers: A main component; the CPU's fastest storage, holding operands, results and addresses (PC, IR, accumulator).

Tip: CPU core = CU + ALU + registers; cache is a memory level that helps the CPU.

Source: ECS 17, Chapter 2 notes: computer architecture (UC Davis)

Correct answer: (d) a global optimization

Pure random search draws candidate points at random from the whole feasible region, evaluates each one and keeps the best seen so far. Because every part of the search space can be sampled, it is not tied to the neighbourhood of a starting point and cannot be trapped in a local optimum. As the number of samples grows, the best point found gets arbitrarily close to the global optimum with probability approaching 1 (for well-behaved problems). That is why random search is classed as a global, stochastic optimisation method, often called "global random search".

Why the other options are wrong

• (a) a greedy: a greedy method always takes the best immediate step; random search's samples ignore the current best point.
• (b) a local optimization: local methods such as hill climbing or gradient descent explore only near the current point and stop at a local optimum.
• (c) an optimal: random search gives no guarantee of reaching the optimum after any finite number of samples.

Tip: Random search = global exploration with no gradients: simple and hard to trap, but needs many samples.

Exam note: "Random search" is read as pure random search over the whole space. Some variants (local random search) sample only near the current point and behave like local methods.

Source: Noonan & Zhigljavsky, rate of convergence of global random search algorithms (arXiv)

Correct answer: (c) data and function both

A C++ class is a user-defined type whose members are mainly data members (the object's state) and member functions (the operations on that state). Keeping both in one unit, with access control (private, protected, public), is what encapsulation means. For example:

class Account {
    double balance;                                   // data member
public:
    void deposit(double amt) { balance += amt; }      // member function
};

Why the other options are wrong

• (a) data only: A class is not limited to data; member functions are a core part of it.
• (b) function only: A class is not limited to functions; it normally holds data members too.
• (d) None of the above: Wrong because (c) correctly describes what a class contains.

A particular class may happen to have only data or only functions, but the general answer to what a class contains is both.

Tip: Class = data members + member functions, wrapped together (encapsulation).

Source: Classes - cppreference.com

Correct answer: (a) Quantum mechanical tunneling

A tunnel (Esaki) diode is a p-n junction doped so heavily that the depletion layer is only about 10 nm wide, and the filled conduction-band states on the n-side line up with empty valence-band states on the p-side. Electrons then pass straight through the thin barrier by quantum-mechanical tunneling instead of climbing over it. At a small forward bias the tunneling current rises to a peak; as the bias grows the bands move out of line and the current falls. That falling part is the negative-resistance region used in very fast oscillators and switches. Beyond the valley the device behaves like an ordinary diode.

Why the other options are wrong

• (b) Zener breakdown: This is reverse breakdown by high-field emission in a diode designed to work in breakdown (a voltage-reference Zener). The field emission is itself a tunneling effect, but the term names reverse breakdown, not the forward negative-resistance action of a tunnel diode.
• (c) Avalanche breakdown: Reverse breakdown by impact ionization, where carriers knock out new electron-hole pairs in a chain; it dominates at higher breakdown voltages and has nothing to do with the tunnel diode's working principle.
• (d) Ionization tunneling: Not a recognised device mechanism; it mixes "impact ionization" (avalanche) with "tunneling".

Tip: Tunnel diode = very heavy doping → very thin junction → tunneling → negative resistance.

Sources: Wikipedia: Tunnel diode; NPTEL Analog Electronics, Lecture 8: Zener Diode

Correct answer: (a) ambiguity of sentences

The core difficulty in Natural Language Processing (NLP) is ambiguity: the same word or sentence can mean different things depending on context. A word can have several senses ("bank" of a river vs a bank for money), and a sentence can have several structures ("I saw the man with the telescope": who has the telescope?). Humans resolve this with context and world knowledge; software must do it automatically, which is why ambiguity is the main challenge of NLP.

Why the other options are wrong

• (b) parts of speech tagging: is a standard NLP task (labelling each word as noun, verb, …), not the main challenge; it is itself hard only because words are ambiguous.
• (c) syntactic analysis: parsing a sentence's grammatical structure is a processing step, and its difficulty again comes from structural ambiguity.
• (d) tokenization: splitting text into words or sub-words is usually the first and simplest preprocessing step.

Tip: Main challenge of NLP = ambiguity (lexical, syntactic, semantic); tagging, parsing and tokenization are tasks.

Source: What Is NLP (Natural Language Processing)? | IBM

Correct answer: (b) allocate resources & set deadlines

Project scheduling turns the work breakdown into a timeline: it orders tasks by their dependencies, estimates each task's duration, sets start and end dates and milestones, and assigns people, equipment and facilities to each task. In short, it answers "who does what, with which resources, by when", so the project can be tracked against firm dates.

Why the other options are wrong

• (a) minimize coding error: that is the goal of quality practices such as reviews, static analysis and testing, not of scheduling.
• (c) test software early: a testing strategy ("shift left"); a schedule may contain test tasks, but early testing is not the purpose of scheduling.
• (d) improve documentation quality: a documentation or quality-assurance concern, unrelated to the timeline.

Tip: Scheduling = tasks + dependencies + durations + resources + deadlines (tools: Gantt chart, PERT/CPM).

Source: Guide to the Software Engineering Body of Knowledge (SWEBOK Guide) V4.0

Correct answer: (c) Log record flushed before data page

Write-ahead logging (WAL) has one central rule: before a changed data page may be written to disk, the log records describing that change must already be on stable storage. Because the log always reaches disk first, after a crash the DBMS can redo committed changes that never reached the data files and undo changes made by transactions that never committed. A useful side effect is that data pages need not be flushed at every commit; only the log has to be.

Why the other options are wrong

• (a) Data first, log later: This is the exact opposite of WAL. If the system crashed after writing the data page but before writing the log, there would be no record with which to undo an uncommitted change.
• (b) No redo phase: WAL is what makes redo (roll-forward) possible; PostgreSQL, for example, recovers by replaying WAL records.
• (d) None of the above: Option (c) states the WAL rule, so this cannot be chosen.

Tip: WAL = "log before data".

Source: PostgreSQL Documentation: Write-Ahead Logging (WAL)